Basic PLC instructions
Be aware that specific nomenclature and operational details vary widely between PLC manufacturers, and often implementation details evolve from generation to generation.
Often the hardest part, especially for an inexperienced PLC programmer, is practicing the mental ju-jitsu necessary to keep the nomenclature straight from manufacturer to manufacturer.
Positive Logic (most PLCs follow this convention)
True = logic 1 = input energized.
False = logic 0 = input NOT energized.
True = logic 0 = input NOT energized
False = logic 1 = input energized.
(XIC) - eXamine If Closed.
This instruction is true (logic 1) when the hardware input (or internal relay equivalent) is energized.
(XIO) - eXamine If Open.
This instruction is true (logic 1) when the hardware input (or internal relay equivalent) is NOT energized.
(OTE) - OuTput Enable.
This instruction mimics the action of a conventional relay coil.
(TON) - Timer ON.
Generally, ON timers begin timing when the input (enable) line goes true, and reset if the enable line goes false before setpoint has been reached. If enabled until setpoint is reached then the timer output goes true, and stays true until the input (enable) line goes false.
(TOF) - Timer OFF.
Generally, OFF timers begin timing on a true-to-false transition, and continue timing as long as the preceding logic remains false. When the accumulated time equals setpoint the TOF output goes on, and stays on until the rung goes true.
(RTO) - Retentive Timer On.
This type of timer does NOT reset the accumulated time when the input condition goes false.
Rather, it keeps the last accumulated time in memory, and (if/when the input goes true again) continues timing from that point. In the Allen-Bradley construction, this instruction goes true once setpoint (preset) time has been reached, and stays true until a RES (RESet) instruction is made true to clear it.
(OTL) - OuTput Latch.
(OTU) - OuTput Unlatch.
Generally, the unlatch operator takes precedence. That is, if the unlatch instruction is true then the relay output is false even though the latch instruction may also be true. In Allen-Bradley ladder logic, latch and unlatch relays are separate operators.
However, other ladder dialects opt for a single operator modeled after RS (Reset-Set) flip-flop IC chip logic.
Jump to Subroutine
(JSR) - Jump to SubRoutine
For jumping from one rung to another the JSR (Jump to Subroutine) command is used.